The edge detector can be used to generate a pulse when detecting a rising edge on its input. To detect a falling edge, the TRUTH table can be programmed to provide inverted output.
The edge detector is enabled by writing
‘1’ to the Edge Detection bit (EDGEDET) in the LUT n Control A
register (CCL.LUTnCTRLA). In order to avoid unpredictable behavior, a valid filter
option must be enabled.
The edge detection is disabled by writing
a ‘0’ to EDGEDET in CCL.LUTnCTRLA. After disabling a LUT, the
corresponding internal edge detector logic is cleared one clock cycle later.
Figure 1. Edge
Detector
