The UPDI contains a comprehensive error detection system that provides information to
the debugger when recovering from an error scenario. The error detection consists of
detecting physical transmission errors like parity error, contention error, and frame
error, to more high-level errors like access timeout error. See the UPDI Error Signature
(PESIG) bits in UPDI.STATUSB register for an overview of the available error
signatures.
Whenever the UPDI detects an error, it will immediately enter an internal
error state to avoid unwanted system communication. In the error state, the UPDI will
ignore all incoming data requests, except if a BREAK character is transmitted. The
following procedure should always be applied when recovering from an error condition.
- Send a BREAK character. See BREAK Character for recommended BREAK character handling.
- Send a SYNCH character at the
desired baud rate for the next data transfer. Upon receiving a BREAK the UPDI
oscillator setting in UPDI.ASI_CTRLA is reset to the 4 MHz default UPDI clock
selection. This affects the baud rate range of the UPDI according to Table 1.
- Execute a Load Control Status
(LDCS) instruction to read the UPDI Error Signature (PESIG) bit in the
UPDI.STATUSB register and get the information about the occurred error. The
error signature in the STATUSB.PESIG will be cleared when the register is
read.
- The UPDI is now recovered from
the error state and ready to receive the next SYNCH character and
instruction.