Control Register E Clear - Normal Mode
This register can be used instead of a Read-Modify-Write (RMW) to clear individual
bits by writing a ‘1’ to its bit location.
| Bit7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| CMD[1:0] | LUPD | DIR | |||||
| Access | R/W | R/W | R/W | R/W | |||
| Reset | 0 | 0 | 0 | 0 | |||
Command
These bits are used for software control of update, restart and Reset
of the timer/counter. The command bits are always read as
‘0’.
| Value | Name | Description |
|---|---|---|
| 0x0 | NONE | No command |
| 0x1 | UPDATE | Force update |
| 0x2 | RESTART | Force restart |
| 0x3 | RESET | Force hard Reset (ignored if the timer/counter is enabled) |
Lock Update
Lock update can be used to ensure that all buffers are valid before an update is performed.
| Value | Description |
|---|---|
| 0 | The buffered registers are updated as soon as an UPDATE condition has occurred |
| 1 | No update of the buffered registers is performed, even though an UPDATE condition has occurred |
Counter Direction
Normally this bit is controlled in hardware by the Waveform Generation mode or by event actions, but it can also be changed from software.
| Value | Description |
|---|---|
| 0 | The counter is counting up (incrementing) |
| 1 | The counter is counting down (decrementing) |