Clock Main Settings Register
Name:
CLKMSR
Offset:
0x37
Reset:
0x00
Access:
-
Bit76543210
CLKMS[1:0]
AccessR/WR/W
Reset00

Bits 1:0 – CLKMS[1:0]: Clock Main Select Bits

Clock Main Select Bits

These bits select the main clock source of the system. The bits can be written at run-time to switch the source of the main clock. The clock system ensures glitch free switching of the main clock source.
Table 1. Selection of Main Clock
CLKM Main Clock Source
00 Calibrated Internal 8MHz Oscillator
01 Internal 128kHz Oscillator (WDT Oscillator)
10 External clock
11 Reserved
To avoid unintentional switching of main clock source, a protected change sequence must be followed to change the CLKMS bits, as follows:
  1. Write the signature for change enable of protected I/O register to register CCP.
  2. Within four instruction cycles, write the CLKMS bits with the desired value.