Table 1. Master Mode| Pin Name |
Pin Description |
Type |
| MCKn |
Master Clock for Clock Unit n |
Input/Output |
| SCKn |
Serial Clock for Clock Unit n |
Input/Output |
| FSn |
I2S
Word Select or TDM Frame Sync for Clock Unit n |
Input/Output |
| SDm |
Serial Data Input or Output for
Serializer m |
Input/Output |
Table 2. Slave Mode| Pin
Name |
Pin
Description |
Type |
| MCKn |
Master
Clock |
Input |
| SCKn |
Serial Clock
for Clock Unit n |
Input |
| FSn |
I2S
Word Select or TDM Frame Sync |
Input |
| SDm |
Serial Data
Input or Output for Serializer m |
Input/Output |
Table 3. Controller Mode| Pin
Name |
Pin
Description |
Type |
| MCKn |
Master Clock
for Clock Unit n |
Output |
| SCKn |
Serial Clock
for Clock Unit n |
Output |
| FSn |
I2S
Word Select or TDM Frame Sync |
Output |
| SDm |
Not
Applicable |
Not
Applicable |
Note: One signal can be mapped on several pins.