Interrupt Flag Status and Clear
Name:
INTFLAG
Offset:
0x18
Reset:
0x00000000
Access:
-
Bit3130292827262524
EVD11 EVD10 EVD9 EVD8
AccessR/WR/WR/WR/W
Reset0000
Bit2322212019181716
OVR11 OVR10 OVR9 OVR8
AccessR/WR/WR/WR/W
Reset0000
Bit15141312111098
EVD7 EVD6 EVD5 EVD4 EVD3 EVD2 EVD1 EVD0
AccessR/WR/WR/WR/WR/WR/WR/WR/W
Reset00000000
Bit76543210
OVR7 OVR6 OVR5 OVR4 OVR3 OVR2 OVR1 OVR0
AccessR/WR/WR/WR/WR/WR/WR/WR/W
Reset00000000

Bits 27,26,25,24,15,14,13,12,11,10,9,8 – EVDn : Channel n Event Detection [n=11..0]

Channel n Event Detection [n=11..0]

This flag is set on the next CLK_EVSYS_APB cycle when an event is being propagated through the channel, and an interrupt request will be generated if INTENCLR/SET.EVDn is one.

When the event channel path is asynchronous, the EVDn interrupt flag will not be set.

Writing a zero to this bit has no effect.

Writing a one to this bit will clear the Event Detected Channel n interrupt flag.

Bits 19,18,17,16,7,6,5,4,3,2,1,0 – OVRn : Channel n Overrun [n=11..0]

Channel n Overrun [n=11..0]

This flag is set on the next CLK_EVSYS cycle after an overrun channel condition occurs, and an interrupt request will be generated if INTENCLR/SET.OVRn is one.

When the event channel path is asynchronous, the OVRn interrupt flag will not be set.

Writing a zero to this bit has no effect.

Writing a one to this bit will clear the Overrun Channel n interrupt flag.