DFLLVAL

Name:: DFLLVAL
Offset:: 0x28
Reset:: 0x00000000
Access:: Read-Synchronized, Write-Protected

Bit31	30	29	28	27	26	25	24
DIFF[15:8]
AccessR	R	R	R	R	R	R	R
Reset0	0	0	0	0	0	0	0
Bit23	22	21	20	19	18	17	16
DIFF[7:0]
AccessR	R	R	R	R	R	R	R
Reset0	0	0	0	0	0	0	0
Bit15	14	13	12	11	10	9	8
COARSE[5:0]						FINE[9:8]
AccessR/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset0	0	0	0	0	0	0	0
Bit7	6	5	4	3	2	1	0
FINE[7:0]
AccessR/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset0	0	0	0	0	0	0	0

Bits 31:16 – DIFF[15:0]: Multiplication Ratio Difference

Multiplication Ratio Difference

In closed-loop mode (DFLLCTRL.MODE is written to one), this bit group indicates the difference between the ideal number of DFLL cycles and the counted number of cycles. This value is not updated in open-loop mode, and should be considered invalid in that case.

Bits 15:10 – COARSE[5:0]: Coarse Value

Coarse Value

Set the value of the Coarse Calibration register. In closed-loop mode, this field is read-only.

Bits 9:0 – FINE[9:0]: Fine Value

Fine Value

Set the value of the Fine Calibration register. In closed-loop mode, this field is read-only.