Features
- Compliant with Inter-IC Sound
(I2S) bus specification
- 2 independent Serializers configurable as
receiver or as transmitter
- Supported data formats:
- 32-, 24-, 20-, 18-, 16-, and
8-bit mono or stereo format
- 16- and 8-bit compact stereo
format, with left and right samples packed in the same word to reduce data
transfers
- Supported data frame formats:
- 2-channel I2S with
Word Select
- 1- to 8-slot Time Division Multiplexed (TDM) with
Frame Sync and individually enabled slots
- 1- or 2-channel Pulse Density
Modulation (PDM) reception for MEMS microphones
- 1-channel burst transfer with
non-periodic Frame Sync
- 2 independent Clock
Units handling either the same clock or separate clocks for the Serializers:
- Suitable for a wide range of
sample frequencies fs, including 32kHz, 44.1kHz, 48kHz, 88.2kHz, 96kHz, and
192kHz
- 16×fs to 1024×fs
Master Clock generated for external audio CODECs
- Master, slave, and controller modes:
- Master: Data received/transmitted
based on internally-generated clocks. Output Serial Clock on SCKn pin, Master
Clock on MCKn pin, and Frame Sync Clock on FSn pin
- Slave: Data received/transmitted based on external clocks on Serial Clock pin (SCKn) or Master Clock pin (MCKn)
- Controller: Only output internally generated Master clock (MCKn), Serial Clock (SCKn), and Frame Sync Clock (FSn)
- Individual enabling and disabling of
Clock Units and Serializers
- DMA interfaces for each Serializer
receiver or transmitter to reduce processor overhead:
- Either one DMA channel for all
data slots or
- One DMA channel per data channel
in stereo
- Smart Data Holding register management to avoid data slots mix after overrun or underrun