NVM Characteristics

Table 1. Maximum Operating Frequency
V_DD range	NVM Wait States	Maximum Operating Frequency	Units
1.62V to 2.7V	0	14	MHz
	1	28
	2	42
	3	48
2.7V to 3.63V	0	24
2.7V to 3.63V	1	48

Note that on this flash technology, a max number of 8 consecutive write is allowed per row. Once this number is reached, a row erase is mandatory.

Table 2. Flash Endurance and Data Retention
Symbol	Parameter	Conditions	Min.	Typ.	Max.	Units
Ret_NVM25k	Retention after up to 25k	Average ambient 55°C	10	50	-	Years
Ret_NVM2.5k	Retention after up to 2.5k	Average ambient 55°C	20	100	-	Years
Ret_NVM100	Retention after up to 100	Average ambient 55°C	25	>100	-	Years
Cyc_NVM	Cycling Endurance⁽¹⁾	-40°C < Ta < 85°C	25k	150k	-	Cycles

1. An endurance cycle is a write and an erase operation.

Table 3. EEPROM Emulation⁽¹⁾ Endurance and Data Retention
Symbol	Parameter	Conditions	Min.	Typ.	Max.	Units
Ret_EEPROM100k	Retention after up to 100k	Average ambient 55°C	10	50	-	Years
Ret_EEPROM10k	Retention after up to 10k	Average ambient 55°C	20	100	-	Years
Cyc_EEPROM	Cycling Endurance⁽²⁾	-40°C < Ta < 85°C	100k	600k	-	Cycles

1. The EEPROM emulation is a software emulation described in the App note AT03265.

2. An endurance cycle is a write and an erase operation.

Table 4. NVM Characteristics (Device Variant A)
Symbol	Parameter	Conditions	Min.	Typ.	Max.	Units
t_FPP	Page programming time	-	-	-	2.5	ms
t_FRE	Row erase time	-	-	-	6	ms
t_FCE	DSU chip erase time (CHIP_ERASE)	-	-	-	240	ms

Table 5. NVM Characteristics (Device Variant B)
Symbol	Parameter	Conditions	Min.	Typ.	Max.	Units
t_FPP	Page programming time	-	-	-	2.5	ms
t_FRE	Row erase time	-	-	-	1.2	ms
t_FCE	DSU chip erase time (CHIP_ERASE)	-	-	-	240	ms