| Bit31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| Access | |||||||
| Reset | |||||||
| Bit23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| LEVEL[5:0] | |||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | |
| Bit15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| PSEL[3:0] | CEN | MODE | |||||
| AccessR/W | R/W | R/W | R/W | R/W | R/W | ||
| Reset0 | 0 | 0 | 0 | 0 | 0 | ||
| Bit7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RUNSTDBY | ACTION[1:0] | HYST | ENABLE | ||||
| Access | R/W | R/W | R/W | R/W | R/W | ||
| Reset | 0 | 0 | 0 | 0 | 0 | ||
BOD33 Threshold Level
This field sets the triggering voltage threshold for the BOD33. See the Electrical Characteristics for actual voltage levels. Note that any change to the LEVEL field of the BOD33 register should be done when the BOD33 is disabled in order to avoid spurious resets or interrupts.
These bits are loaded from Flash User Row at start-up. Refer to NVM User Row Mapping for more details.
Prescaler Select
Selects the prescaler divide-by output for the BOD33 sampling mode according to the table below. The input clock comes from the OSCULP32K 1kHz output.
| PSEL[3:0] | Name | Description |
|---|---|---|
| 0x0 | DIV2 | Divide clock by 2 |
| 0x1 | DIV4 | Divide clock by 4 |
| 0x2 | DIV8 | Divide clock by 8 |
| 0x3 | DIV16 | Divide clock by 16 |
| 0x4 | DIV32 | Divide clock by 32 |
| 0x5 | DIV64 | Divide clock by 64 |
| 0x6 | DIV128 | Divide clock by 128 |
| 0x7 | DIV256 | Divide clock by 256 |
| 0x8 | DIV512 | Divide clock by 512 |
| 0x9 | DIV1K | Divide clock by 1024 |
| 0xA | DIV2K | Divide clock by 2048 |
| 0xB | DIV4K | Divide clock by 4096 |
| 0xC | DIV8K | Divide clock by 8192 |
| 0xD | DIV16K | Divide clock by 16384 |
| 0xE | DIV32K | Divide clock by 32768 |
| 0xF | DIV64K | Divide clock by 65536 |
Clock Enable
Writing a zero to this bit will stop the BOD33 sampling clock.
Writing a one to this bit will start the BOD33 sampling clock.
| Value | Description |
|---|---|
| 0 | The BOD33 sampling clock is either disabled and stopped, or enabled but not yet stable. |
| 1 | The BOD33 sampling clock is either enabled and stable, or disabled but not yet stopped. |
Operation Mode
| Value | Description |
|---|---|
| 0 | The BOD33 operates in continuous mode. |
| 1 | The BOD33 operates in sampling mode. |
Run in Standby
| Value | Description |
|---|---|
| 0 | The BOD33 is disabled in standby sleep mode. |
| 1 | The BOD33 is enabled in standby sleep mode. |
BOD33 Action
These bits are used to select the BOD33 action when the supply voltage crosses below the BOD33 threshold.
These bits are loaded from Flash User Row at start-up.
| ACTION[1:0] | Name | Description |
|---|---|---|
| 0x0 | NONE | No action |
| 0x1 | RESET | The BOD33 generates a reset |
| 0x2 | INTERRUPT | The BOD33 generates an interrupt |
| 0x3 | Reserved |
Hysteresis
This bit indicates whether hysteresis is enabled for the BOD33 threshold voltage:
This bit is loaded from Flash User Row at start-up. Refer to NVM User Row Mapping for more details.
| Value | Description |
|---|---|
| 0 | No hysteresis. |
| 1 | Hysteresis enabled. |
Enable
This bit is loaded from Flash User Row at startup. Refer to NVM User Row Mapping for more details.
| Value | Description |
|---|---|
| 0 | BOD33 is disabled. |
| 1 | BOD33 is enabled. |