DPLL Control A
Name:
DPLLCTRLA
Offset:
0x44
Reset:
0x80
Access:
Write-Protected
Bit76543210
ONDEMANDRUNSTDBYENABLE
AccessR/WR/WR/W
Reset100

Bit 7 – ONDEMAND: On Demand Clock Activation

On Demand Clock Activation

ValueDescription
0 The DPLL is always on when enabled.
1 The DPLL is activated only when a peripheral request the DPLL as a source clock. The DPLLCTRLA.ENABLE bit must be one to validate that operation, otherwise the peripheral request has no effect.

Bit 6 – RUNSTDBY: Run in Standby

Run in Standby

ValueDescription
0 The DPLL is disabled in standby sleep mode.
1 The DPLL is not stopped in standby sleep mode.

Bit 1 – ENABLE: DPLL Enable

DPLL Enable

The software operation of enabling or disabling the DPLL takes a few clock cycles, so check the DPLLSTATUS.ENABLE status bit to identify when the DPLL is successfully activated or disabled.

ValueDescription
0 The DPLL is disabled.
1 The DPLL is enabled.