Power Consumption

The values in this section are measured values of power consumption under the following conditions, except where noted:

Operating conditions
- V_VDDIN = 3.3 V
- VDDIN = 1.8V, CPU is running on Flash with three wait states
Wake up time from sleep mode is measured from the edge of the wakeup signal to the execution of the first instruction fetched in flash.
Oscillators
- XOSC (crystal oscillator) stopped
- XOSC32K (32 kHz crystal oscillator) running with external 32kHz crystal
- DFLL48M using XOSC32K as reference and running at 48 MHz
Clocks
- DFLL48M used as main clock source, except otherwise specified
- CPU, AHB clocks undivided
- APBA clock divided by 4
- APBB and APBC bridges off
The following AHB module clocks are running: NVMCTRL, APBA bridge
- All other AHB clocks stopped
The following peripheral clocks running: PM, SYSCTRL, RTC
- All other peripheral clocks stopped
I/Os are inactive with internal pull-up
CPU is running on flash with 1 wait states
Cache enabled
BOD33 disabled

Table 1. Current Consumption, Device Variant A
Mode	Conditions	T_A	Min.	Typ.	Max.	Units
ACTIVE	CPU running a While(1) algorithm	25°C	3.11	3.37	3.64	mA
	CPU running a While(1) algorithm	85°C	3.24	3.48	3.76
	CPU running a While(1) algorithm V_DDIN=1.8V, CPU is running on Flash with 3 wait states	25°C	3.10	3.36	3.64
		85°C	3.24	3.48	3.75
	CPU running a While(1) algorithm, CPU is running on Flash with 3 wait states with GCLKIN as reference	25°C	60*freq + 74	60*freq + 136	62*freq + 196	μA (with freq in MHz)
		85°C	62*freq + 154	62*freq + 228	62*freq + 302	μA (with freq in MHz)
	CPU running a Fibonacci algorithm	25°C	4.12	4.53	4.92	mA
	CPU running a Fibonacci algorithm	85°C	4.27	4.63	4.98
	CPU running a Fibonacci algorithm V_DDIN=1.8V, CPU is running on flash with 3 wait states	25°C	4.12	4.53	4.92
		85°C	4.27	4.63	4.98
	CPU running a Fibonacci algorithm, CPU is running on Flash with 3 wait states with GCLKIN as reference	25°C	86*freq + 76	88*freq + 136	88*freq + 196	μA (with freq in MHz)
		85°C	88*freq + 156	88*freq + 230	88*freq + 302	μA (with freq in MHz)
	CPU running a CoreMark algorithm	25°C	5.78	6.32	6.80	mA
	CPU running a CoreMark algorithm	85°C	5.93	6.47	7.00
	CPU running a CoreMark algorithm V_DDIN=1.8V, CPU is running on flash with 3 wait states	25°C	5.17	5.60	5.96
		85°C	5.35	5.73	6.10
	CPU running a CoreMark algorithm, CPU is running on Flash with 3 wait states with GCLKIN as reference	25°C	106*freq + 78	106*freq + 136	108*freq + 196	μA (with freq in MHz)
		85°C	106*freq + 154	108*freq + 232	108*freq + 310	μA (with freq in MHz)
IDLE0	Default operating conditions	25°C	1.89	2.04	2.20	mA
IDLE0	Default operating conditions	85°C	1.98	2.14	2.33
IDLE1	Default operating conditions	25°C	1.34	1.46	1.58
IDLE1	Default operating conditions	85°C	1.41	1.55	1.71
IDLE2	Default operating conditions	25°C	1.07	1.17	1.28
IDLE2	Default operating conditions	85°C	1.13	1.27	1.40
STANDBY	XOSC32K running RTC running at 1kHz	25°C	-	4.06	12.8	μA
	XOSC32K running RTC running at 1kHz	85°C	-	55.2	100
	XOSC32K and RTC stopped	25°C	-	2.70	12.2
	XOSC32K and RTC stopped	85°C	-	53.3	100

Table 2. Current Consumption, Device Variant B
Mode	Conditions	T_A	V_CC	Typ.	Max.	Units
ACTIVE	CPU running a While 1 algorithm	25°C	3.3V	3.7	3.9	mA
	CPU running a While 1 algorithm	85°C	3.3V	3.8	4
	CPU running a While 1 algorithm	25°C	1.8V	3.7	3.9
	CPU running a While 1 algorithm	85°C	1,8V	3.8	4
	CPU running a While 1 algorithm, with GCLKIN as reference	25°C	3.3V	72*Freq+107	76*Freq+111	µA (with freq in MHz)
	CPU running a While 1 algorithm, with GCLKIN as reference	85°C	3.3V	72*Freq+198	76*Freq+210	µA (with freq in MHz)
	CPU running a Fibonacci algorithm	25°C	3.3V	4.2	4.6	mA
	CPU running a Fibonacci algorithm	85°C	3.3V	4.3	4.7
	CPU running a Fibonacci algorithm	25°C	1.8V	4.2	4.6
	CPU running a Fibonacci algorithm	85°C	1.8V	4.3	4.7
	CPU running a Fibonacci algorithm, with GCLKIN as reference	25°C	3.3V	83*Freq+107	87*Freq+111	µA(with freq in MHz)
	CPU running a Fibonacci algorithm, with GCLKIN as reference	85°C	3.3V	84*Freq+199	87*Freq+216
	CPU running a CoreMark algorithm	25°C	3.3V	5.2	5.7
	CPU running a CoreMark algorithm	85°C	3.3V	5.3	5.8
	CPU running a CoreMark algorithm	25°C	1.8V	4.8	5.1
	CPU running a CoreMark algorithm	85°C	1.8V	4.9	5.2
	CPU running a CoreMark algorithm, with GCLKIN as reference	25°C	3.3V	104*Freq+109	108*Freq+113	µA (with freq in MHz)
	CPU running a CoreMark algorithm, with GCLKIN as reference	85°C	3.3V	104*Freq+200	109*Freq+212	µA (with freq in MHz)
IDLE0	Default operating conditions	25°C	3.3V	2.4	2.5	mA
IDLE0	Default operating conditions	85°C	3.3V	2.5	2.6
IDLE1	Default operating conditions	25°C	3.3V	1.8	1.9
IDLE1	Default operating conditions	85°C	3.3V	1.9	2
IDLE2	Default operating conditions	25°C	3.3V	1.3	1.4
IDLE2	Default operating conditions	85°C	3.3V	1.4	1.5
STANDBY	XOSC32K running, RTC running at 1kHz	25°C	3.3V	4	6.2	µA
	XOSC32K running, RTC running at 1kHz	85°C	3.3V	54	72
	XOSC32K and RTC stopped	25°C	3.3V	2.8	5.3
	XOSC32K and RTC stopped	85°C	3.3V	52	98.8

Table 3. Wake-up Time
Mode	Conditions	T_A	Min.	Typ.	Max.	Units
IDLE0	OSC8M used as main clock source, Cache disabled	25°C	-	4.0	-	μs
IDLE0	OSC8M used as main clock source, Cache disabled	85°C	-	4.0	-
IDLE1	IOSC8M used as main clock source, Cache disabled	25°C	-	12.1	-
IDLE1	IOSC8M used as main clock source, Cache disabled	85°C	-	13.6	-
IDLE2	IOSC8M used as main clock source, Cache disabled	25°C	-	13.0	-
IDLE2	IOSC8M used as main clock source, Cache disabled	85°C	-	14.5	-
STANDBY	IOSC8M used as main clock source, Cache disabled	25°C	-	19.6	-
STANDBY	IOSC8M used as main clock source, Cache disabled	85°C	-	19.7	-

Figure 1. Measurement Schematic