Workflow

1.
Configure the external 32KHz oscillator source using the previously defined setup function.
```
configure_extosc32k();
```

Enable the configured external 32KHz oscillator source.

enum status_code osc32k_status =
        system_clock_source_enable(SYSTEM_CLOCK_SOURCE_XOSC32K);

if (osc32k_status != STATUS_OK) {
    /* Error enabling the clock source */
}

3.
Configure the DFLL oscillator source using the previously defined setup function.
```
configure_dfll_open_loop();
```

Enable the configured DFLL oscillator source.

enum status_code dfll_status =
        system_clock_source_enable(SYSTEM_CLOCK_SOURCE_DFLL);

if (dfll_status != STATUS_OK) {
    /* Error enabling the clock source */
}

5.
Configure the flash wait states to have two wait states per read, as the high speed DFLL will be used as the system clock. If insufficient wait states are used, the device may crash randomly due to misread instructions.
```
system_flash_set_waitstates(2);
```

Switch the system clock source to the DFLL, by reconfiguring the main clock generator.

struct system_gclk_gen_config config_gclock_gen;
system_gclk_gen_get_config_defaults(&config_gclock_gen);
config_gclock_gen.source_clock    = SYSTEM_CLOCK_SOURCE_DFLL;
config_gclock_gen.division_factor = 1;
system_gclk_gen_set_config(GCLK_GENERATOR_0, &config_gclock_gen);