Timing of the First Interrupt
The PIT function and the RTC function are running off the same counter inside the prescaler, but both functions’ periods can be configured independently:- The RTC period is configured by writing the PRESCALER bit field in RTC.CTRLA.
- The PIT period is configured by writing the PERIOD bit field in RTC.PITCTRLA.
The prescaler is
OFF when both functions are OFF (RTC Enable bit (RTCEN) in RTC.CTRLA
and PIT Enable bit (PITEN) in RTC.PITCTRLA are zero), but it is
running (i.e. its internal counter is counting) when either function
is enabled.
For this reason,
the timing of the first PIT interrupt and the first RTC count tick
will be unknown (anytime between enabling and a full
period).
Continuous Operation
After the first interrupt, the PIT will continue toggling every ½ PIT period, resulting in a full PIT period signal.PIT Timing Diagram for PERIOD=CYC16
For PERIOD=CYC16 in RTC.PITCTRLA, the PIT output effectively follows the state of prescaler counter bit 3, so the resulting interrupt output has a period of 16 CLK_RTC cycles.
The time between writing PITEN to ‘1’ and the first PIT interrupt can vary between virtually 0 and a full PIT period of 16 CLK_RTC cycles. The precise delay between enabling the PIT and its first output is depending on the prescaler’s counting phase: the depicted first interrupt in the lower figure is produced by writing PITEN to ‘1’ at any time inside the leading time window.
Figure 1. Timing Between PIT Enable and
First Interrupt
