Control B

The CRCSCAN.CTRLB register contains the mode and source settings for the CRC. It is not writable when the CRC is busy or when an NMI has been triggered.

Name:
CTRLB
Offset:
0x01
Reset:
0x00
Access:
-
Bit76543210
SRC[1:0]
AccessR/WR/W
Reset00

Bits 1:0 – SRC[1:0]: CRC Source

CRC Source

The SRC bit field selects which section of the Flash the CRC module should check. To set up section sizes, refer to the fuse description.

The CRC can be enabled during internal reset initialization to verify Flash sections before letting the CPU start (see the “Fuses” chapter). If the CRC is enabled during internal reset initialization, the SRC bit field will read out as FLASH, BOOTAPP, or BOOT when normal code execution starts (depending on the configuration).

ValueNameDescription
0x0 FLASH The CRC is performed on the entire Flash (boot, application code, and application data sections).
0x1 BOOTAPP The CRC is performed on the boot and application code sections of Flash.
0x2 BOOT The CRC is performed on the boot section of Flash.
0x3 - Reserved.