Each event channel has several possible event generators, only one of which can be selected at a time. The event generator trigger for a channel is selected by writing to the respective channel register (EVSYS.CHANNELn). By default, the channels are not connected to any event generator. For details on event generation, refer to the documentation of the corresponding peripheral.
A generated event is either synchronous or asynchronous to clocks in the device, depending on the generator. An asynchronous event can be generated in sleep modes when clocks are not running. Such events can also be generated outside the normal edges of the (prescaled) clocks in the system, making the system respond faster than the selected clock frequency would suggest.
| Generator | Event | Generating Clock Domain | Length of Event | Constraints for Synchronous User |
|---|---|---|---|---|
| UPDI | SYNC character | CLK_PDI | Waveform: SYNC char on PDI RX input synchronized to CLK_PDI | Synchronizing clock in user must be fast enough to ensure that the event is seen by the user |
| RTC | Overflow | CLK_RTC | Pulse: 1 * CLK_RTC | None |
| Compare Match | CLK_RTC | Pulse: 1 * CLK_RTC | ||
| PIT | RTC Prescaled clock | CLK_RTC | Level | |
| CCL-LUT | LUT output | Asynchronous | Depends on CCL configuration | The clock source used for CCL must be slower or equal to CLK_PER or input signals to CCL are stable for at least Tclk_per |
| AC | Comparator result | Asynchronous | Level: Typically ≥1 us | The frequency of input signals to AC must be ≤fclk_per to ensure that the event is seen by the synchronous user |
| ADC | Result ready | CLK_ADC | Pulse: 1 * CLK_PER | None |
| PORT | Pin input | Asynchronous | Level: Externally controlled | The input signal must be stable for longer than fclk_per |
| USART | USART Baud clock | TXCLK | Level | None |
| SPI | SPI Master clock | SCK | Level | None |
| TCA | Overflow | CLK_PER | Pulse: 1 * CLK_PER | None |
| Underflow in split mode | CLK_PER | Pulse: 1 * CLK_PER | ||
| Compare match ch 0 | CLK_PER | Pulse: 1 * CLK_PER | ||
| Compare match ch 1 | CLK_PER | Pulse: 1 * CLK_PER | ||
| Compare match ch 2 | CLK_PER | Pulse: 1 * CLK_PER | ||
| TCB | CAPT interrupt flag set | CLK_PER | Pulse: 1 * CLK_PER | None |