VDD=3V, unless stated otherwise.
Table 1. Power Supply, Reference and Input Range
| Symbol |
Description |
Min. |
Typ. |
Max. |
Unit |
| VDD |
Supply Voltage(1) |
1.8 |
3 |
5.5 |
V |
| RLoad |
Resistive External Load |
5 |
- |
- |
kΩ |
| CLoad |
Capacitive External Load |
- |
- |
30 |
pF |
| VOUT |
Output Voltage Range |
0.2 |
- |
VDD-0.2V |
V |
| IOUT |
Output sink/source |
- |
1 |
- |
mA |
Note: 1. Supply voltage must meet the VDD specification for the VREF level used
as DAC reference.
Table 2. Clock and Timing Characteristics
| Symbol |
Description |
Conditions |
Min. |
Typ. |
Max. |
Unit |
| fDAC |
Maximum Conversion Rate |
0.55V≤ VREF≤2.5V |
- |
350 |
- |
ksps |
| VREF=4.3 V |
- |
270 |
- |
ksps |
Table 3. Accuracy Characteristics
| Symbol |
Description |
Conditions |
Min. |
Typ. |
Max. |
Unit |
| Res |
Resolution |
|
- |
|
8 |
bits |
| INL |
Integral Non-Linearity |
0.55V≤VREF≤4.3 |
- |
0.3 |
- |
LSB |
| DNL |
Differential Non-Linearity |
0.55V≤VREF≤4.3 |
- |
0.25 |
- |
LSB |
| EOFF |
Offset Error |
VREF =1.1V VCC = 3.0
T=25C |
- |
±0.25 |
- |
LSB |
| EGAIN |
Gain Error |
VREF=1.1V VCC = 3.0 T=25C |
- |
±1 |
- |
LSB |