Multiplexed Signals
        
Table 1. PORT Function Multiplexing
                
                
                
                
                
                
                
                
                
                
                
                
                
                
                    
                        | SOIC 8-Pin | 
                        Pin Name (1,2) | 
                        Other/Special | 
                        ADC0 | 
                        AC0 | 
                        DAC0 | 
                        USART0 | 
                        SPI0 | 
                        TWI0 | 
                        TCA0 | 
                        TCB0 | 
                        TCD0 | 
                        CCL | 
                    
                
                
                    
                        | 6 | 
                        PA0 | 
                        RESET/UPDI | 
                        AIN0 | 
                          | 
                          | 
                        XDIR | 
                        SS | 
                          | 
                          | 
                          | 
                          | 
                        LUT0-IN0 | 
                    
                    
                        | 4 | 
                        PA1 | 
                          | 
                        AIN1 | 
                          | 
                          | 
                        TxD(3) | 
                        MOSI | 
                        SDA | 
                        WO1 | 
                          | 
                          | 
                        LUT0-IN1 | 
                    
                    
                        | 5 | 
                        PA2 | 
                        EVOUT0 | 
                        AIN2 | 
                          | 
                          | 
                        RxD(3) | 
                        MISO | 
                        SCL | 
                        WO2 | 
                          | 
                          | 
                        LUT0-IN2 | 
                    
                    
                        | 7 | 
                        PA3 | 
                        EXTCLK | 
                        AIN3 | 
                        OUT | 
                          | 
                        XCK | 
                        SCK | 
                          | 
                        WO0/WO3 | 
                          | 
                          | 
                          | 
                    
                    
                        | 8 | 
                        GND | 
                          | 
                          | 
                          | 
                          | 
                          | 
                          | 
                          | 
                          | 
                          | 
                          | 
                          | 
                    
                    
                        | 1 | 
                        VDD | 
                          | 
                          | 
                          | 
                          | 
                          | 
                          | 
                          | 
                          | 
                          | 
                          | 
                          | 
                    
                    
                        | 2 | 
                        PA6 | 
                          | 
                        AIN6 | 
                        AINN0 | 
                        OUT | 
                        TxD | 
                        MOSI(3) | 
                          | 
                          | 
                        WO0 | 
                        WOA | 
                        LUT0-OUT | 
                    
                    
                        | 3 | 
                        PA7 | 
                          | 
                        AIN7 | 
                        AINP0 | 
                          | 
                        RxD | 
                        MISO(3) | 
                          | 
                        WO0(3) | 
                          | 
                        WOB | 
                        LUT1-OUT | 
                    
                
            
 
        Note: 
            
                - 1.Pins names are of type
                    Pxn, with x being the PORT instance and n the pin number.
                    Notation for signals is PORTx_PINn. All pins can be used as event
                    input.
 
                - 2.All pins can be used for external
                    interrupt, where pins Px2 and Px6 of each port have full
                    asynchronous detection.
 
                - 3.Alternate pin positions. For
                    selecting the alternate positions, refer to the PORTMUX documentation.