Clock Source Selection

The CS bits select the clock source for Timer1. These bits allow the selection of several possible synchronous and asynchronous clock sources. The table below lists the clock source selections.

Table 1. Timer Clock Sources
CS Clock Source
Timer1 Timer3 Timer5
11000-11111 Reserved Reserved Reserved
10111 CLC8_out CLC8_out CLC8_out
10110 CLC7_out CLC7_out CLC7_out
10101 CLC6_out CLC6_out CLC6_out
10100 CLC5_out CLC5_out CLC5_out
10011 CLC4_out CLC4_out CLC4_out
10010 CLC3_out CLC3_out CLC3_out
10001 CLC2_out CLC2_out CLC2_out
10000 CLC1_out CLC1_out CLC1_out
01111-01100 Reserved Reserved Reserved
01011 TMR5 overflow TMR5 overflow Reserved
01010 TMR3 overflow Reserved TMR3 overflow
01001 Reserved TMR1 overflow TMR1 overflow
01000 TMR0 overflow TMR0 overflow TMR0 overflow
00111 CLKREF CLKREF CLKREF
00110 SOSC SOSC SOSC
00101 MFINTOSC (500 kHz) MFINTOSC (500 kHz) MFINTOSC (500 kHz)
00100 LFINTOSC LFINTOSC LFINTOSC
00011 HFINTOSC HFINTOSC HFINTOSC
00010 FOSC FOSC FOSC
00001 FOSC/4 FOSC/4 FOSC/4
00000 T1CKIPPS T3CKIPPS T5CKIPPS
Parent topic: Timer1 Module with Gate Control