CWGxAS0

CWGxAS0

CWG Auto-Shutdown Control Register 0

Note:

1.This bit may be written while EN = 0 (CWGxCON0), to place the outputs into the shutdown configuration.
2.The outputs will remain in auto-shutdown state until the next rising edge of the CWG data input after this bit is cleared.

Name:: CWGxAS0
Address:: 0x0F41
Reset:
Access:

Bit7	6	5	4	3	2	1	0
SHUTDOWN	REN	LSBD[1:0]		LSAC[1:0]
AccessR/W/HS/HC	R/W	R/W	R/W	R/W	R/W
Reset0	0	0	1	0	1

Bit 7 – SHUTDOWN: Auto-Shutdown Event Status bit(1,2)

Auto-Shutdown Event Status bit^(1,2)

Value	Description
`1`	An auto-shutdown state is in effect
`0`	No auto-shutdown event has occurred

Bit 6 – REN: Auto-Restart Enable bit

Auto-Restart Enable bit

Value	Description
`1`	Auto-restart is enabled
`0`	Auto-restart is disabled

Bits 5:4 – LSBD[1:0]: CWGxB and CWGxD Auto-Shutdown State Control bits

CWGxB and CWGxD Auto-Shutdown State Control bits

Value	Description
`11`	A logic ‘`1`’ is placed on CWGxB/D when an auto-shutdown event occurs.
`10`	A logic ‘`0`’ is placed on CWGxB/D when an auto-shutdown event occurs.
`01`	Pin is tri-stated on CWGxB/D when an auto-shutdown event occurs.
`00`	The Inactive state of the pin, including polarity, is placed on CWGxB/D after the required dead-band interval when an auto-shutdown event occurs.

Bits 3:2 – LSAC[1:0]: CWGxA and CWGxC Auto-Shutdown State Control bits

CWGxA and CWGxC Auto-Shutdown State Control bits

Value	Description
`11`	A logic ‘`1`’ is placed on CWGxA/C when an auto-shutdown event occurs.
`10`	A logic ‘`0`’ is placed on CWGxA/C when an auto-shutdown event occurs.
`01`	Pin is tri-stated on CWGxA/C when an auto-shutdown event occurs.
`00`	The Inactive state of the pin, including polarity, is placed on CWGxA/C after the required dead-band interval when an auto-shutdown event occurs.