Analog-to-Digital Converter (ADC) Conversion Timing Specifications

Table 1.
Standard Operating Conditions (unless otherwise stated)
Param No.	Sym.	Characteristic	Min.	Typ. †	Max.	Units	Conditions
AD20	T_AD	ADC Clock Period	1	—	9	μs	Using F_OSC as the ADC clock source ADOCS = `0`
AD21	T_AD	ADC Clock Period	—	2	—	μs	Using F_RC as the ADC clock source ADOCS = `1`
AD22	T_CNV	Conversion Time⁽¹⁾	—	11+3T_CY	—	T_AD	Set of GO/DONE bit to Clear of GO/ DONE bit
AD23	T_ACQ	Acquisition Time	—	2	—	μs
AD24	T_HCD	Sample and Hold Capacitor Disconnect Time	—	—	—	μs	F_OSC-based clock source F_RC-based clock source
* - These parameters are characterized but not tested. † Data in “Typ” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested. Note: 1.Does not apply for the ADCRC oscillator.

Figure 1. ADC Conversion Timing (ADC Clock F_OSC-Based)

Figure 2. ADC Conversion Timing (ADC Clock from ADCRC)

Note:

1.If the ADC clock source is selected as ADCRC, a time of T_CY is added before the ADC clock starts. This allows the SLEEP instruction to be executed.