PIR14

Peripheral Interrupt Request Register 14
Note:
  1. 1. Interrupt flag bits get set when an interrupt condition occurs, regardless of the state of its corresponding enable bit, or the global enable bit. User software should ensure the appropriate interrupt flag bits are clear prior to enabling an interrupt.
Name:
PIR14
Address:
0x4BC
Reset:
Access:
Bit76543210
NCO3IFCM2IFCLC7IF
AccessR/W/HSR/W/HSR/W/HS
Reset000

Bit 3 – NCO3IF: NCO3 Interrupt Flag

NCO3 Interrupt Flag

ValueDescription
1 Interrupt has occurred (must be cleared by software)
0 Interrupt event has not occurred

Bit 2 – CM2IF: CMP2 Interrupt Flag

CMP2 Interrupt Flag

ValueDescription
1 Interrupt has occurred (must be cleared by software)
0 Interrupt event has not occurred

Bit 1 – CLC7IF: CLC7 Interrupt Flag

CLC7 Interrupt Flag

ValueDescription
1 Interrupt has occurred (must be cleared by software)
0 Interrupt event has not occurred