When global interrupts are disabled (GIE cleared) and any interrupt source, with the exception of the clock switch interrupt, has both its interrupt enable bit and interrupt flag bit set, one of the following will occur:
- If the interrupt occurs before the execution of a
SLEEPinstructionSLEEPinstruction will execute as aNOP- WDT and WDT prescaler will not be cleared
- TO bit of the STATUS register will not be set
- PD bit of the STATUS register will not be cleared
- If the interrupt occurs during or after the execution of a
SLEEPinstructionSLEEPinstruction will be completely executed- Device will immediately wake-up from Sleep
- WDT and WDT prescaler will be cleared
- TO bit of the STATUS register will be set
- PD bit of the STATUS register will be cleared
In the event where flag bits were checked before executing a
SLEEP instruction, it may be possible for flag bits to have become set
before the SLEEP instruction completes. To determine whether a
SLEEP instruction executed, test the PD bit. If the PD bit is
set, the SLEEP instruction was executed as a NOP.
Figure 1. Wake-up From Sleep Through Interrupt
Note:
- 1.External clock - High, Medium, Low mode assumed.
- 2.CLKOUT is shown here for timing reference.
- 3.TOST = 1024 TOSC. This delay does not apply to EC and INTOSC Oscillator modes.
- 4.GIE =
1assumed. In this case after wake-up, the processor calls the ISR at0x0004. If GIE =0, execution will continue in-line.