ADPRE
| Bit15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| PRE[12:8] | |||||||
| Access | R/W | R/W | R/W | R/W | R/W | ||
| Reset | 0 | 0 | 0 | 0 | 0 | ||
| Bit7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| PRE[7:0] | |||||||
| AccessR/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W |
| Reset0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Precharge Time Select
| PRE | Precharge Time | |
|---|---|---|
CS = 0 |
CS = 1 |
|
1 1111 1111 1111 |
8191 clocks of FOSC | 8191 clocks of ADCRC |
1 1111 1111 1110 |
8190 clocks of FOSC | 8190 clocks of ADCRC |
1 1111 1111 1101 |
8189 clocks of FOSC | 8189 clocks of ADCRC |
| ... | ... | ... |
0 0000 0000 0010 |
2 clocks of FOSC | 2 clocks of ADCRC |
0 0000 0000 0001 |
1 clocks of FOSC | 1 clocks of ADCRC |
0 0000 0000 0000 |
Not included in the data conversion cycle | |