PFM Erase Sequence

The sequence of events for erasing a page of internal program memory is:

1.Set the NVMADR registers to an address within the intended sector.
2.Set the NVMCMD control bits to ‘b110.
3.Disable all interrupts.
4.Perform the unlock sequence as described in the Unlock Sequence section.
5.Set the GO bit.
6.Interrupts can be enabled after the GO bit is clear.
7.Set the NVMCMD control bits to ‘b000.

If the PFM address is write-protected, the GO bit will be cleared, the erase operation will not take place, and the WRERR bit will be set.

While erasing the PFM page, the CPU operation is suspended then resumes when the operation is complete. Upon erase completion, the GO bit is cleared in hardware, the NVMIF is set, and an interrupt will occur (after Step 6), if the NVMIE bit is set and interrupts are enabled.

The buffer data are not affected by erase operations and the NVMCMD bits will remain unchanged.

Figure 1. PFM Page Erase Flowchart

Erasing a Program Flash Memory page

; This sample sector erase routine assumes that the target address
; specified by CODE_ADDR_UPPER and CODE_ADDR_HIGH contain a value within

; the PFM address range of the device.

; Load NVMADR with the base address of the memory page
           MOVLW   CODE_ADDR_UPPER
           MOVWF   NVMADRU
           MOVLW   CODE_ADDR_HIGH
           MOVWF   NVMADRH

ERASE_PAGE:
           MOVLW   0x06               ; Erase Page command
           MOVWF   NVMCON1            ; set the command
           BCF     INTCON0, GIE       ; disable interrupts
;–––––––––– Required Sequence -––––––––––   
           MOVLW   0x55               ; first unlock byte for erase
           MOVWF   NVMLOCK            ; write 0x55
           MOVLW   0xAA               ; second unlock byte for erase
           MOVWF   NVMLOCK            ; write 0xAA
           BSF     NVMCON0, GO        ; start erase (CPU stalls)
;–––––––––––––––––––––––––––––––––––––––––––
           BSF     INTCON, GIE        ; re-enable interrupts
           BTFSC   NVMCON1, WRERR     ; verify operation success
           GOTO    ERASE_FAULT_RECOVERY
           CLRF    NVMCON1            ; disable writes to memory

Important:

1.If a write or erase operation is terminated by an unexpected reset, the WRERR bit will be set which the user can check to decide whether a rewrite of the location(s) is needed.
2.The WRERR bit is set if a write or erase operation is attempted on a write-protected area.
3.The WRERR bit is set if a write or erase operation is attempted on an invalid address location (refer to the device memory map and NVM organization table).