PIR6

Peripheral Interrupt Request Register 6
Note:
  1. 1. Interrupt flag bits get set when an interrupt condition occurs, regardless of the state of its corresponding enable bit, or the global enable bit. User software should ensure the appropriate interrupt flag bits are clear prior to enabling an interrupt.
Name:
PIR6
Address:
0x4B4
Reset:
Access:
Bit76543210
DMA2AIFDMA2ORIFDMA2DCNTIFDMA2SCNTIFNCO1IFCWG1IFCLC2IFINT1IF
AccessR/W/HSR/W/HSR/W/HSR/W/HSR/W/HSR/W/HSR/W/HSR/W/HS
Reset00000000

Bit 7 – DMA2AIF: DMA2 Abort Interrupt Flag

DMA2 Abort Interrupt Flag

ValueDescription
1 Interrupt has occurred (must be cleared by software)
0 Interrupt event has not occurred

Bit 6 – DMA2ORIF: DMA2 Overrun Interrupt Flag

DMA2 Overrun Interrupt Flag

ValueDescription
1 Interrupt has occurred (must be cleared by software)
0 Interrupt event has not occurred

Bit 5 – DMA2DCNTIF: DMA2 Destination Count Interrupt Flag

DMA2 Destination Count Interrupt Flag

ValueDescription
1 Interrupt has occurred (must be cleared by software)
0 Interrupt event has not occurred

Bit 4 – DMA2SCNTIF: DMA2 Source Count Interrupt Flag

DMA2 Source Count Interrupt Flag

ValueDescription
1 Interrupt has occurred (must be cleared by software)
0 Interrupt event has not occurred

Bit 3 – NCO1IF: NCO1 Interrupt Flag

NCO1 Interrupt Flag

ValueDescription
1 Interrupt has occurred (must be cleared by software)
0 Interrupt event has not occurred

Bit 2 – CWG1IF: CWG1 Interrupt Flag

CWG1 Interrupt Flag

ValueDescription
1 Interrupt has occurred (must be cleared by software)
0 Interrupt event has not occurred

Bit 1 – CLC2IF: CLC2 Interrupt Flag

CLC2 Interrupt Flag

ValueDescription
1 Interrupt has occurred (must be cleared by software)
0 Interrupt event has not occurred

Bit 0 – INT1IF: External Interrupt 1 Interrupt Flag

External Interrupt 1 Interrupt Flag

ValueDescription
1 Interrupt has occurred (must be cleared by software)
0 Interrupt event has not occurred