CRC Data Sources

Data can be input to the CRC module in two ways:

Up to 16 bits of data per word are specified with the DLEN bits. Only the number of data bits in the CRCDATA registers specified by DLEN will be used, other data bits in CRCDATA registers will be ignored.

Data is moved into the CRCSHIFT as an intermediate to calculate the check value located in the CRCACC registers.

The SHIFTM bit is used to determine the bit order of the data being shifted into the accumulator and the bit order of the result. The value of DLEN will determine which bit in CRCDATA is the MSb.

Figure 1. CRC Process

When SHIFTM is not set, the data will be shifted in MSb first and the result will be big-endian. When SHIFTM bit is set, the data will be shifted into the accumulator in reversed order, LSb first and the result will be little-endian.

The CRC module can be seeded with an initial value by setting the CRCACC registers to the appropriate value before beginning the CRC.

Figure 2. CRC LFSR Example