PIR0

Peripheral Interrupt Request Register 0

Note:

1. Interrupt flag bits get set when an interrupt condition occurs, regardless of the state of its corresponding enable bit, or the global enable bit. User software should ensure the appropriate interrupt flag bits are clear prior to enabling an interrupt.
2.IOCIF is a read-only bit. To clear the interrupt condition, all bits in the IOCxF registers must be cleared.
3.The CSWIF interrupt will not wake the system from Sleep. The system will Sleep until another interrupt causes the wake-up.

Bit 7 – IOCIF: Interrupt-on-Change Interrupt Flag (2)

Interrupt-on-Change Interrupt Flag ⁽²⁾

Value	Description
1	Interrupt has occurred
0	Interrupt event has not occurred

Bit 5 – CLC1IF: CLC1 Interrupt Flag

CLC1 Interrupt Flag

Value	Description
1	Interrupt has occurred (must be cleared by software)
0	Interrupt event has not occurred

Bit 3 – CSWIF: Clock Switch Interrupt Flag(3)

Clock Switch Interrupt Flag⁽³⁾

Value	Description
1	Interrupt has occurred (must be cleared by software)
0	Interrupt event has not occurred

Bit 2 – OSFIF: Oscillator Failure Interrupt Flag

Oscillator Failure Interrupt Flag

Value	Description
1	Interrupt has occurred (must be cleared by software)
0	Interrupt event has not occurred

Bit 1 – HLVDIF: High/Low-Voltage Detect Interrupt Flag

High/Low-Voltage Detect Interrupt Flag

Value	Description
1	Interrupt has occurred (must be cleared by software)
0	Interrupt event has not occurred

Bit 0 – SWIF: Software Interrupt Flag

Software Interrupt Flag

Value	Description
1	Interrupt will trigger (bit is set and cleared by user software)
0	Interrupt event has not occurred