MDxCON1

MDxCON1

Modulation Control Register 1

Note:

1.Narrowed carrier pulse widths or spurs may occur in the signal stream if the carrier is not synchronized.

Name:: MDxCON1
Address:: 0x6B
Reset:
Access:

Bit7	6	5	4	3	2	1	0
		CHPOL	CHSYNC			CLPOL	CLSYNC
Access		R/W	R/W			R/W	R/W
Reset		0	0			0	0

Bit 5 – CHPOL: Modulator High Carrier Polarity Select

Modulator High Carrier Polarity Select

Value	Description
`1`	Selected high carrier signal is inverted
`0`	Selected high carrier signal is not inverted

Bit 4 – CHSYNC: Modulator High Carrier Synchronization Enable

Modulator High Carrier Synchronization Enable

Value	Description
`1`	Modulator waits for a falling edge on the high time carrier signal before allowing a switch to the low time carrier
`0`	Modulator output is not synchronized to the high time carrier signal⁽¹⁾

Bit 1 – CLPOL: Modulator Low Carrier Polarity Select

Modulator Low Carrier Polarity Select

Value	Description
`1`	Selected low carrier signal is inverted
`0`	Selected low carrier signal is not inverted

Bit 0 – CLSYNC: Modulator Low Carrier Synchronization Enable

Modulator Low Carrier Synchronization Enable

Value	Description
`1`	Modulator waits for a falling edge on the low time carrier signal before allowing a switch to the high time carrier
`0`	Modulator output is not synchronized to the low time carrier signal⁽¹⁾