The SPI Master mode will operate in Sleep, provided the clock source
selected by SPIxCLK is active in Sleep mode. FIFOs will operate as they would when the
part is awake. When TXR = 1, the transmit FIFO will need to contain
data in order for transfers to take place in Sleep. All interrupts will still set the
interrupt flags in Sleep but only enabled interrupts will wake the device from
Sleep.
The SPI Slave mode will operate in Sleep, because the clock is provided by an external master device. FIFOs will still operate and interrupts will set interrupt flags, and enabled interrupts will wake the device from Sleep.