CLCnGLS1

CLCn Gate2 Logic Select Register
Name:
CLCnGLS1
Address:
0x0DD
Reset:
Access:
Bit76543210
G2D4TG2D4NG2D3TG2D3NG2D2TG2D2NG2D1TG2D1N
AccessR/WR/WR/WR/WR/WR/WR/WR/W
Resetxxxxxxxx

Bits 1, 3, 5, 7 – G2DyT: dyT: Gate2 Data ‘y’ True (noninverted)

dyT: Gate2 Data ‘y’ True (noninverted)

ValueDescription
1 dyT is gated into g2
0 dyT is not gated into g2

Bits 0, 2, 4, 6 – G2DyN: dyN: Gate2 Data ‘y’ Negated (inverted)

dyN: Gate2 Data ‘y’ Negated (inverted)

ValueDescription
1 dyN is gated into g2
0 dyN is not gated into g2