CWGxAS0

CWG Auto-Shutdown Control Register 0
Note:
  1. 1.This bit may be written while EN = 0, to place the outputs into the shutdown configuration.
  2. 2.The outputs will remain in Auto-Shutdown state until the next rising edge of the CWG data input after this bit is cleared.
Name:
CWGxAS0
Address:
0x3C2,0x3CB,0x3D4
Reset:
Access:
Bit76543210
SHUTDOWNRENLSBD[1:0]LSAC[1:0]
AccessR/W/HS/HCR/WR/WR/WR/WR/W
Reset000101

Bit 7 – SHUTDOWN: Auto-Shutdown Event Status(1,2)

Auto-Shutdown Event Status(1,2)

ValueDescription
1 An auto-shutdown state is in effect
0 No auto-shutdown event has occurred

Bit 6 – REN: Auto-Restart Enable

Auto-Restart Enable

ValueDescription
1 Auto-restart is enabled
0 Auto-restart is disabled

Bits 5:4 – LSBD[1:0]: CWGxB and CWGxD Auto-Shutdown State Control

CWGxB and CWGxD Auto-Shutdown State Control

ValueDescription
11 A logic ‘1’ is placed on CWGxB/D when an auto-shutdown event occurs.
10 A logic ‘0’ is placed on CWGxB/D when an auto-shutdown event occurs.
01 Pin is tri-stated on CWGxB/D when an auto-shutdown event occurs.
00 The Inactive state of the pin, including polarity, is placed on CWGxB/D after the required dead-band interval when an auto-shutdown event occurs.

Bits 3:2 – LSAC[1:0]: CWGxA and CWGxC Auto-Shutdown State Control

CWGxA and CWGxC Auto-Shutdown State Control

ValueDescription
11 A logic ‘1’ is placed on CWGxA/C when an auto-shutdown event occurs.
10 A logic ‘0’ is placed on CWGxA/C when an auto-shutdown event occurs.
01 Pin is tri-stated on CWGxA/C when an auto-shutdown event occurs.
00 The Inactive state of the pin, including polarity, is placed on CWGxA/C after the required dead-band interval when an auto-shutdown event occurs.