STATUS_SHAD

STATUS Register
Note:
  1. 1.For Borrow, the polarity is reversed. A subtraction is executed by adding the two’s complement of the second operand.
  2. 2.For Rotate (RRCF, RLCF) instructions, this bit is loaded with either the high or low-order bit of the Source register.
Name:
STATUS_SHAD
Address:
0x377
Reset:
Access:
Bit76543210
TOPDNOVZDCC
AccessRRR/WR/WR/WR/WR/W
Reset1100000

Bit 6 – TO: Time-Out

Time-Out

ValueDescription
1 Set at power-up or by execution of CLRWDT or SLEEP instruction
0 A WDT Time-out occurred

Bit 5 – PD: Power-Down

Power-Down

ValueDescription
1 Set at power-up or by execution of CLRWDT instruction
0 Cleared by execution of the SLEEP instruction

Bit 4 – N: Negative

Negative

Used for signed arithmetic (two’s complement); indicates if the result is negative, 
(ALU MSb = 1).
ValueDescription
1 The result is negative
0 The result is positive

Bit 3 – OV: Overflow

Overflow

Used for signed arithmetic (two’s complement); indicates an overflow of the 7-bit magnitude, which causes the sign bit (bit 7) to change state.
ValueDescription
1 Overflow occurred for current signed arithmetic operation
0 No overflow occurred

Bit 2 – Z: Zero

Zero

ValueDescription
1 The result of an arithmetic or logic operation is zero
0 The result of an arithmetic or logic operation is not zero

Bit 1 – DC: Digit Carry / Borrow

Digit Carry / Borrow

ADDWF, ADDLW, SUBLW, SUBWF instructions(1)
ValueDescription
1 A carry-out from the 4th low-order bit of the result occurred
0 No carry-out from the 4th low-order bit of the result

Bit 0 – C: Carry / Borrow

Carry / Borrow

ADDWF, ADDLW, SUBLW, SUBWF instructions(1,2)
ValueDescription
1 A carry-out from the Most Significant bit of the result occurred
0 No carry-out from the Most Significant bit of the result occurred