PWMxSaP2
| Bit15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| P2[15:8] | |||||||
| AccessR/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W |
| Reset0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| Bit7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| P2[7:0] | |||||||
| AccessR/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W |
| Reset0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Parameter 2 Value
| Value | Name | Description |
|---|---|---|
| n | Compare | Compare match event occurs when PWMx timer = n (Refer to MODE selections) |
| n | Variable aligned | PWMx_SaP1_out and PWMx_SaP2 both go low when PWMx timer = n |
| n | Center aligned | PWMx_SaP2_out is high 2*n PWMx clock periods centered around PWMx period event |
| n | Right aligned | PWMx_SaP2_out is high n PWMx clock periods at end of PWMx period |
| n | Left aligned | PWMx_SaP2_out is high n PWMx clock periods at beginning of PWMx period |