When initializing the SPI, several options need to be specified. This is done
by programming the appropriate control bits of the SPIxCON0, SPIxCON1, and SPIxCON2
registers. These control bits allow the following to be configured:
- Master mode (SCK is the clock
output)
- Slave mode (SCK is the clock
input)
- Clock Polarity (Idle state of
SCK)
- Input, Output, and Slave Select
Polarity
- Data Input Sample Phase (middle
or end of data output time)
- Clock Edge (output data on
first/second edge of SCK)
- Clock Rate (Master mode
only)
- Slave Select mode (Master or
Slave mode)
- MSB-First or LSB-First
- Receive/Transmit modes:
- Full-Duplex
- Receive Only (receive
without transmit)
- Transmit Only (transmit
without receive)
- Transfer Counter mode (only
available in Transmit Only mode)