PIR15

PIR15

Peripheral Interrupt Request Register 15

Note:

1. Interrupt flag bits get set when an interrupt condition occurs, regardless of the state of its corresponding enable bit, or the global enable bit. User software should ensure the appropriate interrupt flag bits are clear prior to enabling an interrupt.

Name:: PIR15
Address:: 0x4BD
Reset:
Access:

Bit7	6	5	4	3	2	1	0
				TMR6IF	CRCIF	CLC8IF	NVMIF
Access				R/W/HS	R/W/HS	R/W/HS	R/W/HS
Reset				0	0	0	0

Bit 3 – TMR6IF: TMR6 Interrupt Flag

TMR6 Interrupt Flag

Value	Description
1	Interrupt has occurred (must be cleared by software)
0	Interrupt event has not occurred

Bit 2 – CRCIF: CRC Interrupt Flag

CRC Interrupt Flag

Value	Description
1	Interrupt has occurred (must be cleared by software)
0	Interrupt event has not occurred

Bit 1 – CLC8IF: CLC8 Interrupt Flag

CLC8 Interrupt Flag

Value	Description
1	Interrupt has occurred (must be cleared by software)
0	Interrupt event has not occurred

Bit 0 – NVMIF: NVM Interrupt Flag

NVM Interrupt Flag

Value	Description
1	Interrupt has occurred (must be cleared by software)
0	Interrupt event has not occurred