If the user clears the EN bit, the message will be stopped and the DMA will
return to its default configuration. This is also referred to as a hard stop, as the DMA
cannot resume operation from where it was stopped.
Important: After the DMA message
transfer is stopped, it requires an extra instruction cycle before the Stop condition
takes effect. Thus, after the Stop condition has occurred, a source read or a
destination write can occur depending on the source or destination bus
availability.