Digital Peripherals

Three 16-Bit Pulse-Width Modulators (PWM):
- Dual outputs for each PWM module
- Integrated 16-bit timer/counter
- Double-buffered user registers for duty cycles
- Right/Left/Center/Variable aligned modes of operation
- Multiple clock and Reset signal selections
Four 16-Bit Timers (TMR0/1/3/5)
Three 8-Bit Timers (TMR2/4/6) with Hardware Limit Timer (HLT)
Eight Configurable Logic Cell (CLC):
- Integrated combinational and sequential logic
Three Complimentary Waveform Generators (CWG):
- Rising and falling edge dead-band control
- Full-bridge, half-bridge, 1-channel drive
- Multiple signal sources
- Programmable dead band
- Fault-shutdown input
Three Capture/Compare/PWM (CCP) modules:
- 16-bit resolution for Capture/Compare modes
- 10-bit resolution for PWM mode
Three Numerically Controlled Oscillators (NCO):
- Generates true linear frequency control and increased frequency resolution
- Input clock up to 64 MHz
Signal Measurement Timer (SMT):
- 24-bit timer/counter with prescaler
- Several modes of operation like Time-of-Flight, Period and Duty Cycle measurement etc.
Data Signal Modulator (DSM):
- Multiplex two carrier clocks, with glitch prevention feature
- Multiple sources for each carrier
Programmable CRC with Memory Scan:
- Reliable data/program memory monitoring for Fail-Safe operation (e.g., Class B)
- Calculate 16-bit CRC over any portion of Program Flash Memory
Five UART modules:
- One module (UART1) supports LIN master and slave, DMX mode, DALI gear and device protocols
- Asynchronous UART, RS-232, RS-485 compatible
- Automatic and user timed BREAK period generation
- Automatic checksums
- Programmable 1, 1.5, and two Stop bits
- Wake-up on BREAK reception
- DMA compatible
Two SPI modules:
- Configurable length bytes
- Arbitrary length data packets
- Transmit-without-receive and receive-without-transmit option
- Transfer byte counter
- Separate transmit and receive buffers with 2-byte FIFO and DMA capabilities
One I²C module, SMBus, PMBus™ Compatible:
- 7-bit and 10-bit addressing modes with address masking modes
- Dedicated address, transmit and receive buffers and DMA capabilities
- Bus collision detection with arbitration
- Bus time-out detection and handling
- I²C, SMBus 2.0 and SMBus 3.0, and 1.8V input level selections
- Multi-Master mode, including self-addressing
Device I/O Port Features:
- 25 I/O pins (PIC18F25/26/27Q43)
- 36 I/O pins (PIC18F45/46/47Q43)
- 44 I/O pins (PIC18F55/56/57Q43)
- Individually programmable I/O direction, open-drain, slew rate and weak pull-up control
- Interrupt-on-change on most pins
- Three programmable external interrupt pins
Peripheral Pin Select (PPS):
- Enables pin mapping of digital I/O