TWI Master Mode Wrongly Detects the Start Bit as a Stop Bit

If TWI is enabled in Master mode followed by an immediate write to the MADDR register the bus monitor recognizes the Start bit as a Stop bit.

Work around

Wait for a minimum of two clock cycles from TWI.MCTRLA.ENABLE until TWI.MADDR is written.

Affected Silicon Revisions

ATtiny214/ATtiny414
Rev. A Rev. B            
X -            
ATtiny814
Rev. A Rev. B            
X X            
Parent topic: TWI - Two-Wire Interface