| Device |
The Temperature Sensor is Not Calibrated on Parts with Date Code 727, 728 and 1728 (Year 2017, Week 27/28) |
- |
X |
| AC |
AC Interrupt Flag Not Set Unless Interrupt is Enabled |
X |
- |
| False Triggers May Occur Under Certain Conditions |
X |
- |
| ADC |
One Extra Measurement Performed After Disabling ADC Free-Running Mode |
X |
X |
| Changing ADC Control Bits During Free-Running Mode not Working |
X |
- |
| ADC Wake-Up with WCOMP |
X |
- |
| SAMPDLY and ASDV Does Not Work Together With SAMPLEN |
X |
- |
| ADC Functionality Cannot be Ensured with CLKADC Above 1.5 MHz and a Setting of 25% Duty Cycle |
X |
X |
| ADC Performance Degrades with CLKADC Above 1.5 MHz and VDD < 2.7V |
X |
X |
| CCL |
Connecting LUTs in Linked Mode Require OUTEN Set to ‘1’ |
X |
X |
| D-latch is Not Functional |
X |
X |
| RTC |
Any Write to the RTC.CTRLA Register Resets the RTC and PIT Prescaler |
X |
X |
| Disabling the RTC Stops the PIT |
X |
X |
| TCB |
Minimum Event Duration Must Exceed the Selected Clock Period |
X |
X |
| The TCB Interrupt Flag is Cleared When Reading CCMPH |
X |
- |
| TCB Input Capture Frequency and Pulse-Width Measurement Mode Not Working with Prescaled Clock |
X |
- |
| The TCA Restart Command Does Not Force a Restart of TCB |
X |
X |
| TWI |
TIMEOUT Bits in the TWI.MCTRLB Register are Not Accessible |
X |
- |
| TWI Smart Mode Gives Extra Clock Pulse |
X |
- |
| TWI Master Mode Wrongly Detects the Start Bit as a Stop Bit |
X |
- |
| The TWI Master Enable Quick Command is Not Accessible |
X |
- |
| USART |
TXD Pin Override Not Released When Disabling the Transmitter |
X |
X |
| Frame Error on a Previous Message May Cause False Start Bit Detection |
X |
X |