In this configuration, the AFEC is defined as Single-ended, without averaging and in single Sample-and-Hold mode.
Channel 5 is connected to the 2.4V external DC voltage source. The result of this conversion is 2379 mV, and matches the resulting digital code 2996 out of 4096 (12-bit resolution).
Steps 1 to 5 have been described in the section AFEC Module Introduction. Steps 6 to 8 describe the additional actions to perform if the application requires offset compensation.
Offset compensation is added by setting the register AFEC_COCR of a dedicated channel. To do so, the related channel must be selected previously by setting the register AFEC_CSELR.
/**
* \brief Initialize AFE in Single-Ended.
*
*/
static void _afe_initialization_SingleEnded(void) {
/* Step 1: Configure the pins for AFEC. (If not already done by default) */
/* Step 2: AFEC init */
AFEC_Initialize( AFEC0, ID_AFEC0 );
/*Step 3: AFEC Mode Register Configuration */
AFEC_SetModeReg(AFEC0,AFEC_MR_FREERUN_OFF|AFEC_MR_TRANSFER(1)|AFEC_MR_TRACKTIM(2)| AFEC_MR_ONE| AFEC_MR_STARTUP_SUT512);
/* Step 4 Set AFEC clock AFEC_SetClock() */
AFEC_SetClock( AFEC0, AFE_CLK, BOARD_MCK ) ;
/* Step 5 Select the active channel using the Macro definition AFEC_EnableChannel(). */
AFEC_EnableChannel(AFEC0, TEST_CHANNEL_SINGLE_ENDED);
/* Step 6 Adjust the channel level offset */
AFEC_SetAnalogOffset(AFEC0, TEST_CHANNEL_SINGLE_ENDED, CHANNEL_OFFSET);
/* Step 7 Enable the PGA 0 and 1 of the AFEC0 and adjust the performances by tuning the AFE Bias Current Control */
AFEC_SetAnalogControl(AFEC0, AFEC_ACR_IBCTL(1) | AFEC_ACR_PGA0_ON | AFEC_ACR_PGA1_ON );
/* Step 8 Configure the Extended Mode Register by disabling the Averaging, enabling the channel tag and using the Single Trigger Mode */
AFEC_SetExtModeReg(AFEC0,0|AFEC_EMR_RES_NO_AVERAGE|AFEC_EMR_SIGNMODE_SE_UNSG_DF_SIGN| AFEC_EMR_TAG | AFEC_EMR_STM );
}