ADC Characteristics

Table 1. ADC Characteristics, Single Ended Channel
Symbol Parameter Condition Min. Typ Max Units
  Resolution   - 10 - Bits
TUE Absolute accuracy (Including INL, DNL, quantization error, gain and offset error) VREF = 4V, VCC = 5V, 
CLKADC = 250kHz - 3.5 7 LSB
VREF = 4V, VCC = 5V,
CLKADC = 1MHz - 4 10 LSB
VREF = 4V, VCC = 5V,
 CLKADC = 250kHz

Noise Reduction Mode

- 3 7 LSB
VREF = 5V, VCC = 4V,
 CLKADC = 1MHz
 Noise Reduction Mode - 3.5 10 LSB
INL Integral Non-Linearity VREF = 4V, VCC = 5V,
 CLKADC = 250kHz - 0.6 3 LSB
DNL Differential Non-Linearity VREF = 4V, VCC = 5V,
 CLKADC = 250kHz - 0.3 1 LSB
  Gain Error VREF = 4V, VCC = 5V,
 CLKADC = 250kHz -7 3.5 7 LSB
  Offset Error VREF = 4V, VCC = 5V,
 CLKADC = 250kHz -5 -2.5 -0 LSB
  Conversion Time Free Running Conversion 13 - 260 μs
  Clock Frequency   50 - 1000 kHz
AVCC(1) Analog Supply Voltage   VCC - 0.3 - VCC + 0.3 V
VREF Reference Voltage   1.0 - AVCC V
VIN Input Voltage   GND - VREF V
  Input Bandwidth   - 38.5 - kHz
VINT Internal Voltage Reference 1.1V   1.0 1.1 1.2 V
Internal Voltage Reference 2.56V VDD > 3V 2.3 2.56 2.8 V
RREF Reference Input Resistance   - 32 -
RAIN Analog Input Resistance   - 100 -
Note:
  1. AVCC absolute min./max: 1.8V/5.5V
Table 2. ADC Characteristics, Differential Channels
Symbol Parameter Condition Min Typ Max Units
  Resolution Gain = 1× - 10 - Bits
Gain = 10× - 10 -
Gain = 200× - 10 -
TUE Absolute Accuracy (Including INL, DNL Quantization Error and Offset Error)

Gain = 1×,
VCC = 5V,
VREF = 4V,
CLKADC = 250 kHz

0 12 20 LSB

Gain = 10×,
VCC = 5 V,
VREF = 4V,
CLKADC = 250 kHz

-10 14 30

Gain = 200×,
VCC = 5V,
VREF = 4V,
CLKADC = 250 kHz

-10 10 30
INL Integral Non-linearity (1)

Gain = 1×,
VCC = 5V,
VREF = 4V,
CLKADC = 250 kHz

- 1 3.5 LSB

Gain = 10×,
VCC = 5V,
VREF = 4V,
CLKADC = 250 kHz

- 1 3.5

Gain = 200×,
VCC = 5V,
VREF = 4V,
CLKADC = 250 kHz

- 2 4
DNL Differential Non-linearity(1)

Gain = 1×,
VCC = 5V,
VREF = 4V,
CLKADC = 250 kHz

- 0.5 2 LSB

Gain = 10×,
VCC = 5V,
VREF = 4V,
CLKADC = 250 kHz

- 0.75 2.5

Gain = 200×,
VCC = 5V,
VREF = 4V,
CLKADC = 250 kHz

- 0.75 2.5
  Gain Error

Gain = 1×,
VCC = 5V,
VREF = 4V,
CLKADC = 250 kHz

-20

10

40 LSB

Gain = 10×,
VCC = 5V,
VREF = 4V,
CLKADC = 250 kHz

-20

10

40

Gain = 200×,
VCC = 5V,
VREF = 4V,
CLKADC = 250 kHz

-20 2 20
  Midcode Offset

Gain = 1×,
VCC = 5V,
VREF = 4V,
CLKADC = 250 kHz

-10 -3.5 10 LSB

Gain = 10×,
VCC = 5V,
VREF = 4V,
CLKADC = 250 kHz

-15 -3.5 15

Gain = 200×,
VCC = 5V,
VREF = 4V,
CLKADC = 250 kHz

-20 3 20
  Conversion Time   52 - 260 μs
  Clock Frequency   50 - 250 kHz
AVCC Analog Supply Voltage   VCC - 0.3 - VCC + 0.3 V
VREF Reference Voltage(2)   2.0 - AVCC - 0.5
VDIFF Input Differential Voltage   0 - VREF/Gain
  ADC Conversion Output   -511 - 511 LSB
  Input Bandwidth   - - 9.6 kHz
VINT Internal Voltage Reference 1.1V   1.0 1.1 1.2 V
Internal Voltage Reference 2.56V

VDD>3.3V
(rational: VINT(max)+0.5V)

2.3 2.56 2.8
RREF Reference Input Resistance   - 32 -
Note:
  1. INL and DNL are calculated based on 90% of FSR (Full Scale Range).
  2. It is not recommended to use an external AREF higher than (Vdd-1V) in differential mode, as this will affect ADC accuracy.