Pin Change Mask Register 3
Name:
PCMSK3
Offset:
0x73
Reset:
0x00
Access:
-
Bit76543210
PCINT31PCINT30PCINT29PCINT28PCINT27PCINT26PCINT25PCINT24
AccessR/WR/WR/WR/WR/WR/WR/WR/W
Reset00000000

Bits 0, 1, 2, 3, 4, 5, 6, 7 – PCINT24, PCINT25, PCINT26, PCINT27, PCINT28, PCINT29, PCINT30, PCINT31: Pin Change Enable Mask

Pin Change Enable Mask

Each PCINT[31:24]-bit selects whether pin change interrupt is enabled on the corresponding I/O pin. If PCINT[31:24] is set and the PCIE3 bit in PCICR is set, pin change interrupt is enabled on the corresponding I/O pin. If PCINT[31:24] is cleared, pin change interrupt on the corresponding I/O pin is disabled.