OFFSET

Name:: OFFSET
Offset:: 0x1C
Reset:: 0x0000
Access:: Enable-Protected, PAC Write-Protection, not reset by a software reset

Bit31	30	29	28	27	26	25	24

Access
Reset
Bit23	22	21	20	19	18	17	16
OFFSETC[23:16]
AccessR/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset0	0	0	0	0	0	0	0
Bit15	14	13	12	11	10	9	8
OFFSETC[15:8]
AccessR/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset0	0	0	0	0	0	0	0
Bit7	6	5	4	3	2	1	0
OFFSETC[7:0]
AccessR/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset0	0	0	0	0	0	0	0

Bits 23:0 – OFFSETC[23:0]: Offset Correction

Offset Correction

This value from production test must be loaded from the NVM temperature calibration row into the register by software to achieve the specified accuracy.

The bitfield can also be written by CPU.

These bits define how the TSENS measurement result is compensated for offset error before being written to the VALUE register. This OFFSET value is in two’s complement format.