INTENCLR

Interrupt Enable Clear

This register allows the user to disable an interrupt without doing a read-modify-write operation. Changes in this register will also be reflected in the Interrupt Enable Set register (INTENSET).

Name:: INTENCLR
Offset:: 0x04
Reset:: 0x00
Access:: PAC Write-Protection

Bit7	6	5	4	3	2	1	0
		WIN1	WIN0	COMP3	COMP2	COMP1	COMP0
Access		R/W	R/W	R/W	R/W	R/W	R/W
Reset		0	0	0	0	0	0

Bits 5,4 – WINx: Window x Interrupt Enable

Window x Interrupt Enable

Reading this bit returns the state of the Window x interrupt enable.

Writing a '0' to this bit has no effect.

Writing a '1' to this bit disables the Window x interrupt.

Value	Description
0	The Window x interrupt is disabled.
1	The Window x interrupt is enabled.

Bits 3,2,1,0 – COMPx: Comparator x Interrupt Enable

Comparator x Interrupt Enable

Reading this bit returns the state of the Comparator x interrupt enable.

Writing a '0' to this bit has no effect.

Writing a '1' to this bit disables the Comparator x interrupt.

Value	Description
0	The Comparator x interrupt is disabled.
1	The Comparator x interrupt is enabled.