This flag is cleared by writing a one to the flag.
This flag is set when a Peripheral Access Error occurs while accessing the peripheral associated with the respective INTFLAGC bit, and will generate an interrupt request if INTENCLR/SET.ERR is one.
Writing a zero to this bit has no effect.
Writing a one to this bit will clear the corresponding INTFLAGC interrupt flag.
| Bit31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| Access | |||||||
| Reset | |||||||
| Bit23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| CCL | PTC | DAC | AC | SDADC | ADC1 | ADC0 | TC4 |
| AccessR/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W |
| Reset0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| Bit15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| TC3 | TC2 | TC1 | TC0 | TCC2 | TCC1 | TCC0 | CAN1 |
| AccessR/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W |
| Reset0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| Bit7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| CAN0 | SERCOM5 | SERCOM4 | SERCOM3 | SERCOM2 | SERCOM1 | SERCOM0 | EVSYS |
| AccessR/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W |
| Reset0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Interrupt Flag for CCL
Interrupt Flag for PTC
Interrupt Flag for DAC
Interrupt Flag for AC
Interrupt Flag for SDADC
Interrupt Flag for EVSYS
Interrupt Flag for ADCn [n=1..0]
Interrupt Flag for TCn [n = 4..0]
Interrupt Flag for TCCn [n = 2..0]
Interrupt Flag for CAN
Interrupt Flag for SERCOMn [n = 5..0]