Interrupt Enable
The settings in the
Interrupt Enable register determine which status changes in the Interrupt Register will be
signalled on an interrupt line.
- Name:
- IE
- Offset:
- 0x54
- Reset:
- 0x00000000
- Access:
- -
| Bit31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| | ARAE | PEDE | PEAE | WDIE | BOE | EWE |
| Access | | R/W | R/W | R/W | R/W | R/W | R/W |
| Reset | | 0 | 0 | 0 | 0 | 0 | 0 |
| Bit23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| EPE | ELOE | BEUE | BECE | DRXE | TOOE | MRAFE | TSWE |
| AccessR/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W |
| Reset0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| Bit15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| TEFLE | TEFFE | TEFWE | TEFNE | TFEE | TCFE | TCE | HPME |
| AccessR/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W |
| Reset0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| Bit7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RF1LE | RF1FE | RF1WE | RF1NE | RF0LE | RF0FE | RF0WE | RF0NE |
| AccessR/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W |
| Reset0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit 29 – ARAE: Access to Reserved Address Interrupt Enable
Access to Reserved Address Interrupt
Enable
| Value | Description |
|---|
| 0 |
Interrupt disabled. |
| 1 |
Interrupt enabled. |
Bit 28 – PEDE: Protocol Error in Data Phase Interrupt Enable
Protocol Error in Data Phase Interrupt
Enable
| Value | Description |
|---|
| 0 |
Interrupt disabled. |
| 1 |
Interrupt enabled. |
Bit 27 – PEAE: Protocol Error in Arbitration Phase Interrupt Enable
Protocol Error in Arbitration Phase Interrupt
Enable
| Value | Description |
|---|
| 0 |
Interrupt disabled. |
| 1 |
Interrupt enabled. |
Bit 26 – WDIE: Watchdog Interrupt Enable
Watchdog Interrupt Enable
| Value | Description |
|---|
| 0 |
Interrupt disabled. |
| 1 |
Interrupt enabled. |
Bit 25 – BOE: Bus_Off Status Interrupt Enable
Bus_Off Status Interrupt Enable
| Value | Description |
|---|
| 0 |
Interrupt disabled. |
| 1 |
Interrupt enabled. |
Bit 24 – EWE: Error Warning Status Interrupt Enable
Error Warning Status Interrupt Enable
| Value | Description |
|---|
| 0 |
Interrupt disabled. |
| 1 |
Interrupt enabled. |
Bit 23 – EPE: Error Passive Interrupt Enable
Error Passive Interrupt Enable
| Value | Description |
|---|
| 0 |
Interrupt disabled. |
| 1 |
Interrupt enabled. |
Bit 22 – ELOE: Error Logging Overflow Interrupt Enable
Error Logging Overflow Interrupt Enable
| Value | Description |
|---|
| 0 |
Interrupt disabled. |
| 1 |
Interrupt enabled. |
Bit 21 – BEUE: Bit Error Uncorrected Interrupt Enable.
Bit Error Uncorrected Interrupt Enable.
| Value | Description |
|---|
| 0 |
Interrupt disabled. |
| 1 |
Interrupt enabled. |
Bit 20 – BECE: Bit Error Corrected Interrupt Enable
Bit Error Corrected Interrupt Enable
| Value | Description |
|---|
| 0 |
Interrupt disabled. |
| 1 |
Interrupt enabled. |
Bit 19 – DRXE: Message stored to Dedicated Rx Buffer Interrupt Enable
Message stored to Dedicated Rx Buffer Interrupt
Enable
| Value | Description |
|---|
| 0 |
Interrupt disabled. |
| 1 |
Interrupt enabled. |
Bit 18 – TOOE: Timeout Occurred Interrupt Enable
Timeout Occurred Interrupt Enable
| Value | Description |
|---|
| 0 |
Interrupt disabled. |
| 1 |
Interrupt enabled. |
Bit 17 – MRAFE: Message RAM Access Failure Interrupt Enable
Message RAM Access Failure Interrupt
Enable
| Value | Description |
|---|
| 0 |
Interrupt disabled. |
| 1 |
Interrupt enabled. |
Bit 16 – TSWE: Timestamp Wraparound Interrupt Enable
Timestamp Wraparound Interrupt Enable
| Value | Description |
|---|
| 0 |
Interrupt disabled. |
| 1 |
Interrupt enabled. |
Bit 15 – TEFLE: Tx Event FIFO Event Lost Interrupt Enable
Tx Event FIFO Event Lost Interrupt Enable
| Value | Description |
|---|
| 0 |
Interrupt disabled. |
| 1 |
Interrupt enabled. |
Bit 14 – TEFFE: Tx Event FIFO Full Interrupt Enable
Tx Event FIFO Full Interrupt Enable
| Value | Description |
|---|
| 0 |
Interrupt disabled. |
| 1 |
Interrupt enabled. |
Bit 13 – TEFWE: Tx Event FIFO Watermark Reached Interrupt Enable
Tx Event FIFO Watermark Reached Interrupt
Enable
| Value | Description |
|---|
| 0 |
Interrupt disabled. |
| 1 |
Interrupt enabled. |
Bit 12 – TEFNE: Tx Event FIFO New Entry Interrupt Enable
Tx Event FIFO New Entry Interrupt Enable
| Value | Description |
|---|
| 0 |
Interrupt disabled. |
| 1 |
Interrupt enabled. |
Bit 11 – TFEE: Tx FIFO Empty Interrupt Enable
Tx FIFO Empty Interrupt Enable
| Value | Description |
|---|
| 0 |
Interrupt disabled. |
| 1 |
Interrupt enabled. |
Bit 10 – TCFE: Transmission Cancellation Finished Interrupt Enable
Transmission Cancellation Finished Interrupt
Enable
| Value | Description |
|---|
| 0 |
Interrupt disabled. |
| 1 |
Interrupt enabled. |
Bit 9 – TCE: Transmission Completed Interrupt Enable
Transmission Completed Interrupt Enable
| Value | Description |
|---|
| 0 |
Interrupt disabled. |
| 1 |
Interrupt enabled. |
Bit 8 – HPME: High Priority Message Interrupt Enable
High Priority Message Interrupt Enable
| Value | Description |
|---|
| 0 |
Interrupt disabled. |
| 1 |
Interrupt enabled. |
Bit 7 – RF1LE: Rx FIFO 1 Message Lost Interrupt Enable
Rx FIFO 1 Message Lost Interrupt Enable
| Value | Description |
|---|
| 0 |
Interrupt disabled. |
| 1 |
Interrupt enabled. |
Bit 6 – RF1FE: Rx FIFO 1 Full Interrupt Enable
Rx FIFO 1 Full Interrupt Enable
| Value | Description |
|---|
| 0 |
Interrupt disabled. |
| 1 |
Interrupt enabled. |
Bit 5 – RF1WE: Rx FIFO 1 Watermark Reached Interrupt Enable
Rx FIFO 1 Watermark Reached Interrupt
Enable
| Value | Description |
|---|
| 0 |
Interrupt disabled. |
| 1 |
Interrupt enabled. |
Bit 4 – RF1NE: Rx FIFO 1 New Message Interrupt Enable
Rx FIFO 1 New Message Interrupt Enable
| Value | Description |
|---|
| 0 |
Interrupt disabled. |
| 1 |
Interrupt enabled. |
Bit 3 – RF0LE: Rx FIFO 0 Message Lost Interrupt Enable
Rx FIFO 0 Message Lost Interrupt Enable
| Value | Description |
|---|
| 0 |
Interrupt disabled. |
| 1 |
Interrupt enabled. |
Bit 2 – RF0FE: Rx FIFO 0 Full Interrupt Enable
Rx FIFO 0 Full Interrupt Enable
| Value | Description |
|---|
| 0 |
Interrupt disabled. |
| 1 |
Interrupt enabled. |
Bit 1 – RF0WE: Rx FIFO 0 Watermark Reached Interrupt Enable
Rx FIFO 0 Watermark Reached Interrupt
Enable
| Value | Description |
|---|
| 0 |
Interrupt disabled. |
| 1 |
Interrupt enabled. |
Bit 0 – RF0NE: Rx FIFO 0 New Message Interrupt Enable
Rx FIFO 0 New Message Interrupt Enable
| Value | Description |
|---|
| 0 |
Interrupt disabled. |
| 1 |
Interrupt enabled. |