| Bit7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| PRESCALER[2:0] | |||||||
| Access | R/W | R/W | R/W | ||||
| Reset | 0 | 0 | 0 | ||||
Prescaler Configuration
This field defines the ADC clock relative to the peripheral clock.
This field is not synchronized. For the slave ADC, these bits have no effect when the SLAVEEN bit is set (CTRLA.SLAVEEN= 1).
| Value | Name | Description |
|---|---|---|
| 0x0 | DIV2 | Peripheral clock divided by 2 |
| 0x1 | DIV4 | Peripheral clock divided by 4 |
| 0x2 | DIV8 | Peripheral clock divided by 8 |
| 0x3 | DIV16 | Peripheral clock divided by 16 |
| 0x4 | DIV32 | Peripheral clock divided by 32 |
| 0x5 | DIV64 | Peripheral clock divided by 64 |
| 0x6 | DIV128 | Peripheral clock divided by 128 |
| 0x7 | DIV256 | Peripheral clock divided by 256 |