PIR5
| Bit7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| TMR5GIF | TMR3GIF | TMR1GIF | |||||
| Access | R/W | R/W | R/W | ||||
| Reset | 0 | 0 | 0 |
TMR5 Gate Interrupt Flag bit
| Value | Description |
|---|---|
| 1 | TMR5 gate interrupt occurred (must be cleared in software) |
| 0 | No TMR5 gate occurred |
TMR3 Gate Interrupt Flag bit
| Value | Description |
|---|---|
| 1 | TMR3 gate interrupt occurred (must be cleared in software) |
| 0 | No TMR3 gate occurred |
TMR1 Gate Interrupt Flag bit
| Value | Description |
|---|---|
| 1 | TMR1 gate interrupt occurred (must be cleared in software) |
| 0 | No TMR1 gate occurred |