INTFLAG

Name:: INTFLAG
Offset:: 0x08
Reset:: 0x00000000
Access:: –

Bit31	30	29	28	27	26	25	24

Access
Reset
Bit23	22	21	20	19	18	17	16

Access
Reset
Bit15	14	13	12	11	10	9	8

Access
Reset
Bit7	6	5	4	3	2	1	0
					CLKFAIL	OSC32KRDY	XOSC32KRDY
Access					R/W	R/W	R/W
Reset					0	0	0

Bit 2 – CLKFAIL: XOSC32K Clock Failure Detection

XOSC32K Clock Failure Detection

This flag is cleared by writing a '1' to it.

This flag is set on a zero-to-one transition of the XOSC32K Clock Failure Detection bit in the Status register (STATUS.CLKFAIL) and will generate an interrupt request if INTENSET.CLKFAIL is '1'.

Writing a '0' to this bit has no effect.

Writing a '1' to this bit will clear the XOSC32K Clock Failure Detection flag.

Bit 1 – OSC32KRDY: OSC32K Ready

OSC32K Ready

This flag is cleared by writing a '1' to it.

This flag is set by a zero-to-one transition of the OSC32K Ready bit in the Status register (STATUS.OSC32KRDY), and will generate an interrupt request if INTENSET.OSC32KRDY=1.

Writing a '0' to this bit has no effect.

Writing a '1' to this bit clears the OSC32K Ready interrupt flag.

Bit 0 – XOSC32KRDY: XOSC32K Ready

XOSC32K Ready

This flag is cleared by writing a '1' to it.

This flag is set by a zero-to-one transition of the XOSC32K Ready bit in the Status register (STATUS.XOSC32KRDY), and will generate an interrupt request if INTENSET.XOSC32KRDY=1.

Writing a '0' to this bit has no effect.

Writing a '1' to this bit clears the XOSC32K Ready interrupt flag.